Not sure I understand your question. Hardware engineering is a big domain. For my niche, ASIC design, the paradigm is mostly “get to tapeout” and get all milestone docs and checklists signed. A lot of formal processes have been put into place to improve the quality and the speed of the design cycle. But as usual, it creates a lot of overhead, and the focus does not become on better and faster but to get the docs signed. Even though senior designers can list up at least five items that with little effort improve both quality and speed of the design cycle. And that improvement ouperforms any paperwork/quality/project management system anyday. Unfortunately there is no cost sheet cell to put a few manweeks on improvement. And more important, it is not in the KPI’s. In the world of not thinking past the current quarter, there is no room for optimal anywhere.
Hardware and software advisor for tech startups. ASIC, FPGA, RPi, Arduino, AI, robots, drones, blockchain, Machine learning, vision processing, IoT and 3D printers are my fields of expertise.